High-Performance Computing News Analysis | insideHPC

The International Supercomputer Conference, ISC 2022, is now open for registration and as such, this year’s ISC will be the first major HPC conference to be held on-site (with partial online streaming) since SC19 in Denver. Conference organizers report that exhibit space for the event — to be held at the Congress Center Hamburg, Germany […]The post ISC 2022: Registration Open, 3,000 On-site Attendees Expected, Updated COVID19 Rules appeared first on insideHPC.

“Crusher,” a partial form of the planned 100+-cabinet Frontier supercomputer at the U.S. Department of Energy’s Oak Ridge National Laboratory, is now running principal scientific codes at the Oak Ridge Leadership Computing Facility. The Crusher test system is comprised of 1.5 cabinets powered by 3rd Gen AMD EPYC CPUs and AMD Instinct MI250x GPU accelerators. […]The post Oak Ridge: Frontier Exascale to Deliver ‘Full User Operations’ on Jan. 1, 2023; ‘Crusher’ Test System Now Running Code appeared first on insideHPC.

[SPONSORED POST] When considering a large complex system, such as an AI cluster, supercomputer, or compute cluster, you may think you only have two options—build from scratch from the ground up, or buy a pre-configured, supercomputer-in-a-box from a major technology vendor that everyone else is buying. But there is a third option that takes a best-of-both-worlds approach. This gives you “building blocks” expertly designed around network, storage, and compute configurations that are balanced, but also flexible enough to provide scalability for your specific project needs.The post Solving AI Cluster Design Challenges with a Building Block Approach appeared first on insideHPC.

In a recently published paper, "Reinventing High Performance Computing: Challenges and Opportunities," three HPC luminaries have started an important discussion about the future of HPC and its impact on American competitiveness. In this episode of the @HPCpodcast, we talk with one of the authors, Dan Reed of the University of Utah, on the challenges facing the United States as it strives to compete globally in high-end supercomputing.The post @HPCpodcast: Dan Reed on the Challenges to U.S. Global Supercomputing Competitiveness appeared first on insideHPC.

NVIDIA dropped its attempted acquisition of Arm Ltd. earlier this year, but it remains an Arm technology licensee. And today, in a bid to take on the x86 architecture’s long dominance in data center server chips, the company announced its first Arm Neoverse-based data center CPU “designed for AI infrastructure and high performance computing, providing […]The post NVIDIA Introduces 144-Core Grace CPU ‘Superchip’ for AI, HPC appeared first on insideHPC.

At GTC today, NVIDIA bolstered its “AI data center” technology with the launch of the Hopper architecture for accelerated computing, delivering what the company said is an order of magnitude performance improvement over its predecessor, Ampere, launched two years ago. Named for Grace Hopper, a pioneering U.S. computer scientist, the company also announced its first […]The post At GTC: NVIDIA Launches Hopper Architecture and 80-billion Transistor GPU for AI Data Centers appeared first on insideHPC.

As NVIDIA kicked off virtual GTC this morning, the company unveiled more than 60 updates to its CUDA-X libraries, tools and technologies for developers building accelerated applications in HPC-related fields such as 6G, quantum computing, genomics, drug discovery and logistics optimization, as well as robotics, cybersecurity and data analytics. NVIDIA also said the CUDA platform […]The post NVIDIA at GTC: 60+ Updates to CUDA-X Libraries for Accelerated Computing appeared first on insideHPC.

Seeking to continue on its market share eating roll in the data center server chips sector, AMD announced GA of what the company said is the world’s first data center CPU using 3D die stacking, the 3rdGen AMD EPYC with AMD 3D V-Cache technology, formerly codenamed “Milan-X.” Initially announced last November and built on the […]The post AMD Announces GA of 3rd Gen AMD EPYCs with 3D V-Cache for Technical Computing appeared first on insideHPC.

ALBUQUERQUE, N.M. — Postdoctoral researchers who are designated Truman and Hruby fellows experience Sandia National Laboratories differently from their peers. Appointees to the prestigious fellowships are given the latitude to pursue their own ideas, rather than being trained by fitting into the research plans of more experienced researchers. To give wings to this process, the […]The post Truman and Hruby 2022 Fellows at Sandia Explore Their Possibilities appeared first on insideHPC.

High performance computing (HPC) requires an extremely high-powered network with ultra-low latency to move large files between HPC nodes quickly. IT and network operations (NetOps) teams in industries such as financial service, oil and gas, animation/3D rendering and pharmaceutical research need to monitor their networks in exacting detail to ensure they can support HPC workloads. But monitoring latency and other metrics at HPC-class performance levels creates a new set of challenges, including monitoring packets at 40Gbps and 100Gbps speeds, measuring latency at millisecond and nanosecond intervals, and detecting miniscule “microbursts” of traffic before they cause performance issues.The post Why HPC Clusters Require Ultra-Low Latency Network Monitoring appeared first on insideHPC.