How error-correction IP provides 20db improvements of time-interleaving spurious effects, in high-speed ADC systems
by from IEEE Spectrum on (#32AJQ)
n this webinar, Teledyne SP Devices' ADX time-interleaving ADC IP will be explained, detailing the use of a digital block for the post processing of the output from interleaved ADCs and how it can be used with any ADC.