Video: Gen-Z High-Performance Interconnect for the Data-Centric Future
by Rich Brueckner from High-Performance Computing News Analysis | insideHPC on (#3K30D)
Greg Casey from Dell gave this talk at the 2018 OCP Summit. "Gen-Z is different. It is a high-bandwidth, low-latency fabric with separate media and memory controllers that can be realized inside or beyond traditional chassis limits. It treats all components as memory (so-called memory-semantic communications), and it moves data between them with minimal overhead and latency. It thus takes full advantage of emerging persistent memory (memory accessed over the data bus at memory speeds). It can also handle other compute elements, such as GPUs, FPGAs, and ASIC or coprocessor-based accelerators."
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