[$] Memory-mapped I/O without mysterious macros
Concurrency is hard even when the hardware's behavior is entirelydeterministic; it gets harder in situations where operations can bereordered in seemingly random ways. In these cases, developers tend toreach for barriers as a way of enforcing ordering, but explicit barriersare tricky to use and are often not the best way to think about theproblem. It is thus common to see explicit barriers removed as codematures. That now seems to be happening with an especially obscuretype of barrier used with memory-mapped I/O (MMIO) operations.