Article 4W6JR [$] Developers split over split-lock detection

[$] Developers split over split-lock detection

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corbet
from LWN.net on (#4W6JR)
A "split lock" is a low-level memory-bus lock taken by the processor for a memoryrange that crosses a cache line. Most processors disallow split locks, butx86 implements them, Split locking may be convenient for developers, butit comes at a cost: a single split-locked instruction can occupy the memorybus for around 1,000 clock cycles. It is thus understandable that interestin eliminating split-lock operations is high. What is perhaps lessunderstandable is that a patch set intended to detect split locks has beenpending since (at least) May 2018, and it still is not poised to enter themainline.
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