Article 63APJ Introduction to High-Level Synthesis (HLS) in Data Acquisition Systems

Introduction to High-Level Synthesis (HLS) in Data Acquisition Systems

by
Teledyne
from IEEE Spectrum on (#63APJ)
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High-level synthesis (HLS) is used to develop firmware for field-programmable gate arrays (FPGAs) in languages such as C.

Join Teledyne SP Devices for an introductory webinar on HLS in the context of high-performance digitizers.

Register now for this free webinar!

Topics covered in this webinar:

  • Benefits of onboard FPGA signal processing
  • FPGA architecture and development basics
  • Programming languages and development tools
  • Application areas and signal processing examples

Who should attend?

Developers that want to learn more about the possibilities and benefits of onboard digital signal processing in high-performance digitizers.

What attendees will learn?

An introduction to FPGA development for high-performance digitizers.

Presenter: Thomas Elter, Senior Field Applications Engineer

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