Article 6WP4B Intel Continues Exploring Energy Aware Scheduling For Hybrid CPUs Without SMT

Intel Continues Exploring Energy Aware Scheduling For Hybrid CPUs Without SMT

by
Michael Larabel
from Phoronix on (#6WP4B)
While Intel's Core Ultra 200V "Lunar Lake" SoCs with on-package memory has been reported to be a one-off design, besides the integrated memory it was also notable for being a hybrid core design while lacking Hyper Threading (HT / SMT) support. The notion of hybrid P/E core CPUs without SMT looks like it will continue with Intel software engineers still exploring Energy Aware Scheduling (EAS) around such layouts...
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