Preparing for Advanced Manycore Architectures – and Implications on the Interconnect

In this video from the 2015 OFS Developer's Workshop, Katie Antypas from LBNL describes preparations for the Cori supercomputer. "We need to emphasize here that the Knights Landing processor is self-hosted, and so that means it's not an accelerator. It's not a coprocessor and the particular kernel processor that will be having for NERSC-8, will have more than 60 cores and it will have multiple hardware threads for the core. That's a lot, right? Having 60 cores per node with multiple hardware threads. That a significant increase from both our Hopper and Edison system, which has 24 cores each."