Accessing registers of a PCIE device from a big endian host processor
by MahendraL from LinuxQuestions.org on (#52AZG)
Hi,
I have a PCIE device attached to Broadcom XLP (MIPS) host processor.
The user space software gets access to the PCIE device registers address space
by doing ioctl on the PCIE device driver.
The XLP processor is in big endian mode. As PCIE is always in little endian mode,
when reading the PCIE device register (32-bits) from the software on XLP processor,
byte swapping should be needed after reading the register value. Similarly for when
writing to the device register.
But what I observe is that without byte swapping, things are working fine.
It's as if the XLP processor is acting in little endian mode when in fact it's in
big endian mode and the software is also big endian binary.
Any ideas for above behavior ?
Thank you.
I have a PCIE device attached to Broadcom XLP (MIPS) host processor.
The user space software gets access to the PCIE device registers address space
by doing ioctl on the PCIE device driver.
The XLP processor is in big endian mode. As PCIE is always in little endian mode,
when reading the PCIE device register (32-bits) from the software on XLP processor,
byte swapping should be needed after reading the register value. Similarly for when
writing to the device register.
But what I observe is that without byte swapping, things are working fine.
It's as if the XLP processor is acting in little endian mode when in fact it's in
big endian mode and the software is also big endian binary.
Any ideas for above behavior ?
Thank you.