Initial Support for the riscv64 Architecture

With the followingcommit,Dale Rahn (drahn@)imported initial support for the64-bitRISC-Varchitecture:

CVSROOT:/cvsModule name:srcChanges by:drahn@cvs.openbsd.org2021/04/22 20:42:17Added files:sys/arch/riscv64: Makefile sys/arch/riscv64/compile: Makefile Makefile.inc sys/arch/riscv64/compile/GENERIC: Makefile sys/arch/riscv64/compile/RAMDISK: Makefile sys/arch/riscv64/conf: GENERIC Makefile.riscv64 RAMDISK files.riscv64 kern.ldscript sys/arch/riscv64/dev: mainbus.c mainbus.h plic.c plic.h riscv_cpu_intc.c riscv_cpu_intc.h simplebus.c simplebusvar.h timer.c timer.h sys/arch/riscv64/include: _float.h _types.h asm.h atomic.h bootconfig.h bus.h cdefs.h conf.h cpu.h cpufunc.h db_machdep.h disklabel.h elf.h endian.h exec.h fdt.h fenv.h frame.h ieee.h ieeefp.h intr.h kcore.h limits.h loadfile_machdep.h mutex.h param.h pcb.h pmap.h proc.h profile.h pte.h ptrace.h reg.h reloc.h riscv64var.h riscvreg.h sbi.h setjmp.h signal.h softintr.h spinlock.h syscall.h tcb.h timetc.h trap.h vmparam.h sys/arch/riscv64/riscv64: ast.c autoconf.c bus_dma.c bus_space.c conf.c copy.S copyinout.S copystr.S cpu.c cpufunc_asm.S cpuswitch.S db_disasm.c db_interface.c db_trace.c disksubr.c fpu.c genassym.cf intr.c locore.S locore0.S machdep.c mem.c pagezero.S pmap.c process_machdep.c sbi.c sig_machdep.c softintr.c support.S syscall.c trap.S trap_machdep.c vm_machdep.c Log message:Initial import of OpenBSD/riscv64This work is based on the effort:https://www.openbsd.org/papers/Porting_OpenBSD_to_RISCV_FinalReport.pdf"Porting OpenBSD to RISC-V ISA"byBrian Bamsch <bbamsch@google.com>Wenyan He <wenyan.he@sjsu.edu>Mars Li <mengshi.li.mars@gmail.com>Shivam Waghela <shivamwaghela@gmail.com>With additional work by Dale Rahn <drahn@openbsd.org>

Congratulations and thanks to all involved!