Article 5PGC9 Intel Posts Initial Code For x86 User Interrupts On Linux - Shows Great Performance Potential

Intel Posts Initial Code For x86 User Interrupts On Linux - Shows Great Performance Potential

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from Phoronix on (#5PGC9)
In addition to the big Advanced Matrix Extensions support still being in flux and the kernel-side AMX code not yet being merged, another feature of next year's Xeon "Sapphire Rapids" that we are only now seeing in early published form for the Linux kernel is handling of x86 user interrupts...
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