Article 5PZK5 Intel's User Interrupts With Sapphire Rapids Looking Quite Great For Faster IPC

Intel's User Interrupts With Sapphire Rapids Looking Quite Great For Faster IPC

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from Phoronix on (#5PZK5)
Earlier this month Intel engineers posted their initial Linux kernel enablement around x86 User Interrupts with this feature premiering with Xeon "Sapphire Rapids" CPUs. As implied by the name, the User Interrupt functionality allows for interrupts to bypass the kernel for more efficient, low-latency, low-utilization interrupts being received by other user-space tasks. Intel talked more about User Interrupts this week at LPC2021...
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