Article 5XSMX RISC-V CPU Idle Support, Other RISC-V Improvements Merged Into Linux 5.18

RISC-V CPU Idle Support, Other RISC-V Improvements Merged Into Linux 5.18

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from Phoronix on (#5XSMX)
Last week the main RISC-V pull for Linux 5.18 brought Sv57 five level page table support, improved PolarFire SoC support, an optimized MEMMOVE code, support for Restartable Sequences, and more. A second batch of RISC-V feature updates were sent out this week and now merged for making Linux 5.18 even better for this open processor ISA...
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