User-space SPI device access on MT7621 OpenWRT
by eMKa94 from LinuxQuestions.org on (#6K4KH)
Hi,
I have ported the NXP NFC Reader library for Linux to the OpenWRT Build system for the HLK MT7621 EVB board.
The library uses GPIOs and SPI from user space. I already figured out how to set up the GPIOs but SPI is quite a mystery for me.
HW Configuration in library headers looks like this:
#ifdef PHDRIVER_LINUX_USER_SPI
#define PHDRIVER_USER_SPI_BUS 0 /**< "/dev/spidev0.0" */
#define PHDRIVER_USER_SPI_CS 0 /**< "/dev/spidev0.0" */
#define PHDRIVER_USER_SPI_FREQ 5000000 /**< 5 MHz. */
#define PHDRIVER_USER_SPI_CFG_DIR "/dev/spidev"
But on my target there is no /dev/spidev*** device at all ?
My question what should I do to instruct the spidev driver that I have something connected to SPI bus with chip select pin 1, so it could be used from the user-space ?
Do I have to add some subnode to SPI bus in device tree ? It is not well documented how to use it (or I was searching in wrong places)...
BTW If I understand the actual configuration well, there is a NAND Flash memory (where the image is stored) connected to the same SPI bus on the 'chip select 0 pin' and I'm afraid that I could brick my device if some experiments will fail so i want to be sure what I'm doing.
I have ported the NXP NFC Reader library for Linux to the OpenWRT Build system for the HLK MT7621 EVB board.
The library uses GPIOs and SPI from user space. I already figured out how to set up the GPIOs but SPI is quite a mystery for me.
HW Configuration in library headers looks like this:
#ifdef PHDRIVER_LINUX_USER_SPI
#define PHDRIVER_USER_SPI_BUS 0 /**< "/dev/spidev0.0" */
#define PHDRIVER_USER_SPI_CS 0 /**< "/dev/spidev0.0" */
#define PHDRIVER_USER_SPI_FREQ 5000000 /**< 5 MHz. */
#define PHDRIVER_USER_SPI_CFG_DIR "/dev/spidev"
But on my target there is no /dev/spidev*** device at all ?
My question what should I do to instruct the spidev driver that I have something connected to SPI bus with chip select pin 1, so it could be used from the user-space ?
Do I have to add some subnode to SPI bus in device tree ? It is not well documented how to use it (or I was searching in wrong places)...
BTW If I understand the actual configuration well, there is a NAND Flash memory (where the image is stored) connected to the same SPI bus on the 'chip select 0 pin' and I'm afraid that I could brick my device if some experiments will fail so i want to be sure what I'm doing.