[$] Support for the TSO memory model on Arm CPUs

At the CPU level, a memory model describes, among other things, the amountof freedom the processor has to reorder memory operations. If low-levelcode does not take the memory model into account, unpleasant surprises arelikely to follow. Naturally, different CPUs offer different memory models,complicating the portability of certain types of concurrent software. Tomake life easier, some Arm CPUs offer the ability to emulate the x86 memorymodel, but efforts to make that feature available in the kernel are runninginto opposition.