Article 6Q408 Aug. 21 Argonne Webinar on chipStar: a HIP implementation for Aurora Exascale

Aug. 21 Argonne Webinar on chipStar: a HIP implementation for Aurora Exascale

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from High-Performance Computing News Analysis | insideHPC on (#6Q408)
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Aug. 20, 2024 - The Argonne Leadership Computing Facility will hold a webinar tomorrow from 11 am to noon Central Time covering chipStar, a HIP implementation for Aurora, the exascale-class supercomputer housed at Argonne. Registration information can be found here. ALCF Performance Engineering Team Lead Brice Videau will present chipStar, Argonne's implementation of HIP, and [...]

The post Aug. 21 Argonne Webinar on chipStar: a HIP implementation for Aurora Exascale appeared first on High-Performance Computing News Analysis | insideHPC.

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