Article 77SKE Samsung's fab roadmaps examined — Taylor, Pyeongtaek, and the yield woes behind a $16.5 billion Tesla deal

Samsung's fab roadmaps examined — Taylor, Pyeongtaek, and the yield woes behind a $16.5 billion Tesla deal

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Divided across two countries and four campuses, Samsung's foundry roadmap runs from the Korean bases at Pyeongtaek, Hwaseong, and Giheung to the new U.S. site at Taylor. Samsung began mass-producing its first-gen 2nm process in 2025, moved equipment into its long-delayed Taylor, Texas fab in April this year, and lined up Tesla's AI6 processor under a $16.5 billion contract signed in July 2025, yet none of it has closed the gap with TSMC.

Samsung confirmed the 2nm milestone in its fourth-quarter 2025 results, the same release in which it returned its foundry unit toward profitability on the back of HBM4 logic-die orders. The unit still trails TSMC roughly 11:1 by revenue, and 2nm yields are reported to be sitting near 55%, below the threshold the business needs to run advanced nodes at a profit.

What separates Samsung from TSMC isn't fabs or customers but yield, and Samsung has been able to absorb the cost of that gap because its foundry unit sits inside the Device Solutions division alongside a memory business posting record profits. The company reports no standalone foundry P&L, which has given the operation years of runway that a pure-play foundry wouldn't have the benefit of.

Taylor, Texas

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(Image credit: Samsung Semiconductor Global)

Samsung's Taylor project is both the centerpiece of its roadmap and the company's longest-running headache. The full campus, covering two fabs, an advanced packaging facility, and an R&D center, has been reported at around $44 billion, with the portion tied to U.S. funding set at over $37 billion. Samsung's CHIPS Act award was revised down from up to $6.4 billion to up to $4.745 billion as the project's scope narrowed, with Texas adding roughly $250 million in state incentives in September last year.

Construction stalled through 2024 and into 2025, with reporting at the time attributing the halt to an absence of committed customers and yield problems on the node the fab was meant to run. Samsung held an equipment move-in ceremony in April, and the site is now set to install a third-gen SF2P+ variant of its 2nm process, with trial production targeted by the end of 2026, full mass production in 2027, and a capacity goal of around 50,000 wafer starts per month. The facility's anchor tenant is Tesla, whose AI6 chip Samsung will build at Taylor under the eight-year deal running through 2033. Tesla's AI6 has reportedly slipped by around six months, tied to a delayed engineering run on Samsung's 2nm line, pushing volume toward late 2027.

Pyeongtaek

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(Image credit: Samsung)

Pyeongtaek remains Samsung's largest production base, built out across a series of lines designated P1 through P5. In the near term, activity at Pyeongtaek centers on P4, where Samsung has pulled forward equipment move-in and is reported to be installing an HBM4 base-die line on its 1c-class DRAM, and on P5, the final planned fab at the site, where construction had been halted and is now reviving on the strength of AI memory demand. The P5 buildout carries a reported total investment of nearly 90 trillion won and a 2029 production target, according to Korean trade press.

The Korean expansion runs against a backdrop of capex restraint. Through 2024 and 2025, Samsung was reported to have cut foundry investment sharply and to have reviewed pausing both Pyeongtaek and Taylor work as losses mounted, with foundry utilization sitting around 50% in the second half of 2024 before recovering as clients returned.

Hwaseong and Giheung R&D

Process development runs out of Hwaseong's EUV line. The newer Giheung NRD-K research complex, a roughly 20 trillion won investment running to 2030 and dedicated to advanced-node R&D. Samsung deployed an ASML High-NA EUV research tool, the Twinscan EXE:5000, at Hwaseong for process development, and was understood to be buying two mass-production-class EXE:5200 systems - with the second originally being due to arrive in the first half of this year - aimed at the SF1.4 node and next-generation DRAM.

On the logic side, that plan has since shifted: Samsung's updated roadmap keeps SF1.4 on Low-NA tooling and reserves High-NA for the 1nm generation. Given that this research base feeds the production fabs, its output will now set the pace for how quickly Samsung can stabilize 2nm and move to 1.4nm.

The processes

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(Image credit: Samsung)

Samsung's 2nm family runs from the first-generation SF2, now in mass production, through SF2P this year, the SF2P+ variant headed to Taylor, and SF2Z, which adds backside power delivery and is planned for mass production in 2027. The 1.4nm node, SF1.4, was originally targeted for 2027 mass production when Samsung announced it at the 2022 Foundry Forum. That date is now officially 2029, per an updated roadmap Samsung presented at the 2026 Next-Generation Lithography + Patterning Conference in August, which commits the company to three more years of refining the SF2 family before moving down a node.

The same presentation gave Samsung's first confirmation of where High-NA EUV enters production: not at 2nm or 1.4nm, but with the 1nm-class SF1A node around 2030. "We believe High-NA EUV will become necessary from A10 and below," Chang Min Park, Master VP of Technology at Samsung Electronics, told the conference, saying the tooling needs further improvement before it can carry mass production at larger nodes. SF1A is slated to run alongside SF1.4+, an enhanced 1.4nm variant that stays on proven Low-NA flows, so customers wary of High-NA's smaller exposure field and higher cost will have a fallback on familiar tooling.

As always, roadmaps live and die by their yields, and Samsung's is no exception. The company's first-gen 2nm yields were reported as climbing through 2025, but as of April, they still sat near 55%, below the level the business needs for profitable high-volume output, with reporting suggesting Qualcomm could route work back to TSMC as a result. These figures are obviously estimates rather than Samsung disclosures, and they've varied across sources, but they're consistent enough to say that yield - not capacity or customers - is Samsung's biggest constraint with 2nm.

To compensate, Samsung has been pulling back aggressively on price to stay competitive. The company is reported to have cut its 2nm wafer price to around $20,000, undercutting TSMC by roughly 33%, a discount that'll no doubt win price-sensitive work but compress the margin on a node already running below break-even yields. Undercutting on price while trailing on yield is a difficult combination to fund, which is why the unit's losses have set the pace of its recovery.

Exynos and external customers

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(Image credit: Samsung)

Samsung's anchor customer on 2nm is its own mobile chip unit. The Exynos 2600, built on SF2, is the node's first commercial product and powers the standard Galaxy S26 and S26+. However, the Galaxy S26 Ultra runs Qualcomm's Snapdragon SoCs worldwide, and the Exynos reportedly covers only around a quarter to a third of S26 builds because yields cap how many it can supply.

A successor, the Exynos 2700 on SF2P, is in development for the Galaxy S27, with mass production targeted for the second half of this year. Samsung using its own processor to prove a node before committing to external customers is the same play we saw the company run at 3nm.

Externally, 2nm customers remain thin. The clearest to date is Japanese AI firm Preferred Networks, which Samsung confirmed as a turnkey customer for SF2 plus 2.5D packaging on AI accelerators. Tesla's AI6 is obviously the biggest name, and there are reports of a 2nm CPU order from a North American fabless customer identified as AMD and of advanced-stage talks with Qualcomm over Snapdragon work, though neither is confirmed.

HBM4

The strongest case for Samsung's integrated model sits in memory rather than logic. The company said it shipped the industry's first commercial HBM4 in February this year, running at 11.7 Gbps per pin against the 8 Gbps JEDEC baseline and extendable to 13 Gbps, with per-stack bandwidth up to 3.3 TB/s. The logic base die under that stack is built on Samsung's own 4nm foundry process, which lets the company source the base die in-house rather than buying it from TSMC as some rivals must, and it's reported to be moving the base die for custom HBM to its 2nm process for samples in 2027.

That capability has translated into qualification, with Nvidia CEO Jensen Huang confirming in June that Samsung, SK hynix, and Micron had all passed certification to supply HBM4 for the Vera Rubin platform. Samsung is still the smaller supplier, with analysts putting SK hynix at roughly two-thirds of Nvidia's HBM4 allocation and Samsung in the mid-20% range. Still, qualification of all three vendors ends the period when Samsung was locked out of Nvidia's top memory tier.

Samsung has also moved early on the next step, having begun shipping HBM4E samples around May, claiming roughly 3.6 TB/s of bandwidth, and is positioning custom HBM with logic-based dies tailored to individual accelerator customers, including Nvidia, AMD, Broadcom, and hyperscalers, with samples due in 2027. SK hynix followed with its own HBM4E samples weeks later, so although the lead is measured in weeks rather than generations, memory is the part of Samsung's business where it competes at the front rather than from behind.

Firmly in second place

Samsung has reshuffled its foundry leadership twice in a year, naming Han Jin-man to head the business in November 2024 and restoring a dual-CEO structure over the Device Solutions division in November 2025, with Jun Young-hyun over the DS division and Roh Tae-moon added as co-CEO.

The reshuffles followed a stretch in which foundry and System LSI losses were put by analysts at 3.18 trillion won for 2024, before reportedly narrowing below 1 trillion won by the third quarter of 2025 as utilization recovered from around 50% in late 2024 toward roughly 80% in early 2026. Chairman Jay Y. Lee has publicly ruled out spinning the foundry off to address the conflict that running it alongside the Exynos design unit creates for fabless customers, saying the company intends to grow the business rather than separate it.

The spending behind that recovery is massive, with Samsung having guided to more than 110 trillion won in combined facilities and R&D investment for 2026. The Device Solutions division is taking the bulk of a 10.2 trillion won first-quarter capital outlay, and Taylor ramp investments are set to rise from the second quarter onward. Ultimately, the company is funding an advanced-node buildout on both sides of the Pacific while the unit that runs those fabs is only now climbing back toward break-even.

In Q4 2025, TrendForce put TSMC's foundry revenue at $33.7 billion against roughly $3.4 billion for Samsung's foundry unit, leaving Samsung second with around 7% of the market. By Q1 2026, the same source had TSMC at $35.86 billion and Samsung near $3.2 billion, a gap of roughly 11 to one. Samsung is reported to be targeting foundry profitability by 2027, and a 20% market share, and its own 2026 guidance promises double-digit revenue growth and improved profitability driven by advanced nodes. The company is also reported to be reviewing a second Taylor fab and moving foundry leadership closer to its U.S. customers, a sign it's planning for the demand it hasn't yet converted.

Whether that holds depends on the same metric that has dogged the Taylor launch and the Tesla schedule. SF2 mass production and a marquee customer are both in place; what closes the distance to TSMC, or fails to, is yield reaching the level that makes a $44 billion fab and a $16.5 billion contract pay for themselves.

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