Story 2014-08-28 2RAD RISC vs CISC: which chip architecture is the most efficient?

RISC vs CISC: which chip architecture is the most efficient?

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in hardware on (#2RAD)
story imageIt's been a long-brewing argument, and for ages everyone has claimed that ARM chips are more power efficient due to fundamental differences in the architecture of its instruction set.
A new research paper examines these claims using a variety of ARM cores as well as a Loongson MIPS microprocessor, Intel's Atom and Sandy Bridge microarchitectures, and AMD's Bobcat.

This paper is an updated version of one I've referenced in previous stories, but its methods and claims are worth investigating in more detail. ISA investigations are intrinsically difficult given that it's effectively impossible to separate the theoretical efficiency of an architecture from the proficiency of its design team or the technical expertise of its manufacturer. Even products that seem identical can have important differences.
Extremetech looks into it via a series of benchmarks and concludes "The RISC vs. CISC argument should've passed into history a long time ago. It may still have some relevance in the microcontroller realm, but has nothing useful to contribute to the modern era. An x86 chip can be more power efficient than an ARM processor, or vice versa, but it'll be the result of other factors - not whether it's x86 or ARM."
Reply 3 comments

Ultimate RISC (Score: 1, Informative)

by Anonymous Coward on 2014-08-29 09:14 (#2RKH)

Well, I'm still waiting for the ultimate RISC CPU, with only one instruction: dwim. That's the only instruction you should ever need.

Re: Ultimate RISC (Score: 4, Funny)

by zafiro17@pipedot.org on 2014-08-29 10:59 (#2RM3)

Took me a minute to figure out "do what I mean." I was thinking, "Deal with it, motherfu ..." Although they're not far apart.

Re: Ultimate RISC (Score: 0)

by Anonymous Coward on 2014-08-30 10:32 (#2RWK)

I'd designed just such a CPU back in the '90s. The only problem was, programs always raised the interrupt DIYmf, which got into an endless loop.