PRACE Posts Best Practice Guide for Intel Xeon Phi
by Rich Brueckner from High-Performance Computing News Analysis | insideHPC on (#2BPM1)
The European PRACE initiative has published a new Best Practice Guide for Intel Xeon Phi, Knights Landing Edition. "This best practice guide provides information about Intel's MIC architecture and programming models for the Intel Xeon Phi co-processor in order to enable programmers to achieve good performance of their applications. The guide covers a wide range of topics from the description of the hardware of the Intel Xeon Phi co-processor through information about the basic programming models as well as information about porting programs up to tools and strategies how to analyze and improve the performance of applications."
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