Article 2BPM1 PRACE Posts Best Practice Guide for Intel Xeon Phi

PRACE Posts Best Practice Guide for Intel Xeon Phi

by
Rich Brueckner
from High-Performance Computing News Analysis | insideHPC on (#2BPM1)
phi.jpg

The European PRACE initiative has published a new Best Practice Guide for Intel Xeon Phi, Knights Landing Edition. "This best practice guide provides information about Intel's MIC architecture and programming models for the Intel Xeon Phi co-processor in order to enable programmers to achieve good performance of their applications. The guide covers a wide range of topics from the description of the hardware of the Intel Xeon Phi co-processor through information about the basic programming models as well as information about porting programs up to tools and strategies how to analyze and improve the performance of applications."

The post PRACE Posts Best Practice Guide for Intel Xeon Phi appeared first on insideHPC.

External Content
Source RSS or Atom Feed
Feed Location http://insidehpc.com/feed/
Feed Title High-Performance Computing News Analysis | insideHPC
Feed Link https://insidehpc.com/
Reply 0 comments