Article 4R91A GlobalFoundries Develops "12LP+" Fabrication Process

GlobalFoundries Develops "12LP+" Fabrication Process

by
martyb
from SoylentNews on (#4R91A)

An Anonymous Coward writes:

https://www.anandtech.com/show/14905/globalfoundries-unveils-12lp-technology-massive-performance-power-improvements

GlobalFoundries has introduced its 12LP+ fabrication process that relies on the groundwork set by its 14LPP and 12LP technologies and provides significant improvements when it comes to performance, power, and area (PPA) scaling. The specialty foundry positions the technology for developers of chips for cloud and edge AI applications.

GlobalFoundries' 12LP+ manufacturing technology builds upon the company's 12LP process yet enables a 20% increase in performance (at the same power and complexity) or a 40% reduction in power requirements (at the same clocks and complexity) as well as a 15% improvement in logic area scaling when compared to 12LP platform. Among other things, 12LP+ supports 0.5V SRAM bit cells (which probably use IP that the company designed for its 7 nm nodes). In addition, GF developed a new 2.5D interposer that enables 12LP+ SoCs to work with HBM memory.

So, "LP" is Low-Power, and "LPP" is Low-Power Plus", and "LP+" is Low-Power Plus", too?

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