IMEC and GlobalFoundries Demonstrate Processor-in-Memory Efficiency Breakthrough
takyon writes:
Imec Develops Efficient Processor In Memory Technique for GloFo
Imec and GlobalFoundries have demonstrated a processor-in-memory chip that can achieve energy efficiency up to 2900 TOPS/W, approximately two orders of magnitude above today's commercial processor-in-memory chips. The chip uses an established idea, analog computing, implemented in SRAM in GlobalFoundries' 22nm fully-depleted silicon-on-insulator (FD-SOI) process technology. Imec's analog in-memory compute (AiMC) will be available to GlobalFoundries customers as a feature that can be implemented on the company's 22FDX platform.
Since a neural network model may have tens or hundreds of millions of weights, sending data back and forth between the memory and the processor is inefficient. Analog computing uses a memory array to store the weights and also perform multiply-accumulate (MAC) operations, so there is no memory-to-processor transfer needed. Each memristor element (perhaps a ReRAM cell) has its conductance programmed to an analog level which is proportional to the required weight.
[...] Imec has built a test chip, called analog inference accelerator (AnIA), based on GlobalFoundries' 22nm FD-SOI process. AnIA's 512k array of SRAM cells plus digital infrastructure including 1024 DACs and 512 ADCs takes up 4mm2. It can perform around half a million computations per operation cycle based on 6-bit (plus sign bit) input activations, ternary weights (-1, 0, +1) and 6-bit outputs.
[...] Imec showed accuracy results for object recognition inference on the CIFAR 10 dataset which dropped only one percentage point compared to a similarly quantised baseline. With a supply voltage of 0.8 V, AnIA's energy efficiency is between 1050 and 1500 TOPS/W at 23.5 TOPS. For 0.6 V supply voltage, AnIA achieved 5.8 TOPS at around 1800-2900 TOPS/W.
Promising application: edge computing facial recognition cameras for the surveillance state.
Also at Wccftech.
See also: Week In Review: Auto, Security, Pervasive Computing
Previously: IBM Reduces Neural Network Energy Consumption Using Analog Memory and Non-Von Neumann Architecture
Related: "3nm" Test Chip Taped Out by Imec and Cadence
GlobalFoundries Abandons "7nm LP" Node, TSMC and Samsung to Pick Up the Slack - "The manufacturer will continue to cooperate with IMEC, which works on a broader set of technologies that will be useful for GF's upcoming specialized fabrication processes..."
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