Article 5F3CZ Wait, What? MIPS Becomes RISC-V

Wait, What? MIPS Becomes RISC-V

by
martyb
from SoylentNews on (#5F3CZ)

DannyB writes:

Wait, What? MIPS Becomes RISC-V
Classic CPU Company Exits Bankruptcy, Throws in the Towel

What a long, strange trip it's been. MIPS Technologies no longer designs MIPS processors. Instead, it's joined the RISC-V camp, abandoning its eponymous architecture for one that has strong historical and technical ties. The move apparently heralds the end of the road for MIPS as a CPU family, and a further (slight) diminution in the variety of processors available. It's the final arc of an architecture.

[...] Development of the MIPS processor architecture has now stopped, and MIPS (the company) will start making chips based on RISC-V. This is a complete change of business model, not just CPU. The old MIPS was in the business of licensing IP, just like ARM or Ceva or Rambus. It didn't make anything tangible. Companies like the old Wave Computing were its customers, and processors like ARM and RISC-V were its competitors. Now that equation is inverted.

The company didn't have far to go to find a new CPU. RISC-V is the brainchild of Dave Patterson and his team at UC Berkeley, and he's co-author of the seminal textbook on CPU design along with John Hennessy at Stanford. Hennessy's MIPS (Microprocessor without Interlocked Pipeline Stages) preceded RISC-V by about two decades, but the two are remarkably similar in underlying concept and philosophy.

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