Article 6XD3Z Telum II at Hot Chips 2024: mainframe with a unique caching strategy

Telum II at Hot Chips 2024: mainframe with a unique caching strategy

by
Thom Holwerda
from OSnews on (#6XD3Z)

Mainframes still play a vital role in today, providing extremely high uptime and low latency for financial transactions. Telum II is IBM's latest mainframe processor, and is designed unlike any other server CPU. It only has eight cores, but runs them at a very high 5.5 GHz and feeds them with 360 MB of on-chip cache. IBM also includes a DPU for accelerating IO, along with an on-board AI accelerator. Telum II is implemented on Samsung's leading edge 5 nm process node.

IBM's presentation has already been covered by other outlets. Therefore I'll focus on what I feel like is Telum (II)'s most interesting features. DRAM latency and bandwidth limitations often mean good caching is critical to performance, and IBM has a often deployed interesting caching solutions. Telum II is no exception, carrying forward a virtual L3 and virtual L4 strategy from prior IBM chips.

Chester Lam at Chips and Cheese

If you've been keeping track, you can possibly deduce that I'm bit of a sucker for IBM's mainframes and big POWER machines. These Telum II processors are absolutely wild.

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