Article 28X0G Crossbar ReRAM in Production chasing terabyte nonvolatile memories at sub-20 nanosecond read and write

Crossbar ReRAM in Production chasing terabyte nonvolatile memories at sub-20 nanosecond read and write

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noreply@blogger.com (brian wang)
from NextBigFuture.com on (#28X0G)
Crossbar Inc. a developer of non-volatile resistive RAM (ReRAM) based on silver-over-amorphous-silicon technology, kept its promise to be in production in 2016.

The Crossbar ReRAM for embedded non-volatile memory applications is in production at partner foundry Semiconductor Manufacturing International Corp. (SMIC) using a 40nm CMOS process and is sampling to SMIC customers, according to Sylvain Dubois, Crossbar's vice president of strategic marketing and business development.

40nm ReRAM in production and 28nm CMOS will follow in the first half of 2017.

Crossbar is one of many companies racing to develop a non-volatile memory technology that could replace flash memory and scale to 28nm and beyond. ReRAM has looked a likely candidate after the failure of phase change memory to succeed in the market place. But there are numerous versions of ReRAM technology and in many cases a deep understanding of the physics behind switching and failure modes has been missing. Some have even indicated that Magnetic RAM could be the non-volatile memory to win out at the 28nm node

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Crossbar ReRAM technology delivers 100x lower read latency and 20x faster write performance compared to NAND Flash and doesn't have the Flash design constraint to build memory arrays in large blocks that can be independently but atomically erased. Crossbar's ReRAM technology can be architected with small pages that can be independently erased or re-programmed. This new storage architecture simplifies drastically the complexity of the storage controller by removing a large portion of the background memory accesses required for garbage collection. With a Write Amplification equals to 1, the benefits to the users are visible in terms of read and write latencies, lower energy consumption and increased lifetime of the storage solutions.

With that breakthrough performance and reliability, very high capacity, low power consumption and tunability to multiple storage architectures, Crossbar will enable a new wave of electronics innovation for consumer electronics, enterprise storage, mobile computing, industrial/automotive/medical, connected devices and wearable device applications.

Two fab process parameters are critical to the device - the thickness of the switching layer film (TSL), and the critical dimension (CD) over which the switching phenomenon occurs. Both of these are easily controlled with current state-of-the-art manufacturing tools for lithography, PECVD film deposition, and metal etch tools in today's 20 to 40 nm node fabs.

Crossbar's ReRAM can use the same equipment set currently used in manufacturing the peripheral CMOS-based circuits and the memory element can be implemented at low temperatures. The thermal budget of the ReRAM implementation does not impact the CMOS. And depending on the type of memory, ReRAM layers can typically survive the thermal budget up to 16 stacks without showing significant changes to device performance. 3D ReRAM stacking is totally different from 3D NAND stacking and can be done very easily using backend integration.

Storage Class Memories like Crossbar's ReRAM have a chance of capturing this elusive NAND replacement $40+ billion prize.

ReRAM is already showing considerable advantages over flash memory, including read latencies of 20 nanoseconds and write latencies of 12 nanoseconds, which compare with millisecond latencies for flash memory, Dubois said. "We don't have block erase so a single byte can be rewritten," he added. As to endurance Dubois said Crossbar guarantees 100k read-write cycles. "For these applications 100k is the target although we are pushing for higher endurance," said Dubois.

Crossbar also claims the ability to do 3D stacking of its dense cross-point memory arrays, which together the ability to scale below 10nm and to store multiple bits per cell, would allow high capacity non-volatile terabyte memories on a single die.

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