High Demand Reported for TSMC's Chip-on-Wafer-on-Substrate Packaging
takyon writes:
Report: TSMC CoWoS Production Line at Full Capacity as Demand Increases
Despite the downturn of events around the world, TSMC is witnessing a significant increase in demand for its Chip-on-Wafer-on-Substrate (CoWoS) packaging, according to DigiTimes' unnamed industry sources. The Taiwanese silicon manufacturer is purportedly running its CoWoS production lines at full capacity.
CoWoS as is a 2.5D method of packaging multiple individual dies side-by-side on a single silicon interposer. The benefits are the ability to increase the density in small devices as you run into the limits of how big individual dies can be produced, better interconnectivity between dies and lower power consumption.
According to DigiTimes, AMD, Nvidia, HiSilicon, Xilinx and Broadcom have placed orders for the tech, with demand for high-performance computing chips, high bandwidth memory (HBM)-powered AI accelerators and ASICs during the past two weeks.
Examples of CoWoS packaged silicon are [...] AMD's Vega VII graphics cards, as well as Nvidia's V100 cards, which have HBM on the same silicon interposer where the GPU is. With the GPU and memory so close together, memory bandwidth is significantly higher on these chips compared to those using GDDR6 memory located elsewhere on the graphics card's PCB. Additionally, the PCB becomes much smaller.
Also at Wccftech.
Previously: TSMC Shows Off Gigantic Silicon Interposer
TSMC's Chip-on-Wafer-on-Substrate (CoWoS) Connects Multiple Interposers
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