Vertical Gate-All-Around Transistors vs. Row Hammer
takyon writes:
MRAM Tech Startup Says Its Device Solves DRAM's Row Hammer Vulnerability
Fremont, Calif.-based magnetic RAM startup, Spin Memory, says it has developed a transistor that allows MRAM and resistive RAM to be scaled down considerably. According to the company, the device could also defeat a stubborn security vulnerability in DRAM called Row Hammer.
Spin Memory calls the device the "Universal Selector." In a memory cell, the selector is the transistor used to access the memory element-a magnetic tunnel junction in MRAM, a resistive material in RRAM, and a capacitor in DRAM. These are usually built into the body of the silicon, with the memory element constructed above them. Making the selector smaller and simplifying the layout of interconnects that contact it, leads to more compact memory cells.
[...] With DRAM, the main memory of choice for computers, the Universal Selector has an interesting side-effect: it should make the memory immune to the Row Hammer. This vulnerability occurs when a row of DRAM cells is rapidly charged and discharged. (Basically, flipping the bits at an extremely high rate.) Stray charge from this action can migrate to a neighboring row of cells, corrupting the bits there. [...] According to Lewis, the new device is immune to this problem because the transistor channel is outside of the bulk of the silicon, and so it's isolated from the wandering charge. "This is a root-cause fix for row hammer," he says.
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