Turbo9: a pipelined 6809 microprocessor IP

The Turbo9 is a pipelined microprocessor IP written in Verilog that executes a superset of the Motorola 6809 instruction set. It is a new modern microarchitecture with 16-bit internal datapaths that balances high performance vs small area / low power. The Turbo9R with a 16-bit memory interface achieves 0.69 DMIPS/MHz which is 3.8 times faster than Motorola's original 8-bit MC6809 implementation. It is an active graduate research project at the Department of Electrical & Computer Engineering at the University of Florida.

Turbo9 GitHub page

The Turbo9 is aimed at SoC sub-blocks and small mixed-signal ASIC, so it's definitely not intended to be some sort of general purpose CPU. The reason for opting for the 6809 instead of, say, RISC-V or ARM, is that the 6809 enables a far smaller footprint due to being 16bit, which is all the target market really needs from the Turbo9.

The current version of the Turbo9 is thoroughly verified and is capable of running C code. However, we still consider this version v0.9 because we are missing a few items. All the 6809 instructions and addressing modes have been implemented and tested except SYNC and CWAI. The signed versions of the Turbo9's 16-bit divide and multiply need to be completed. Interrupts are partially implemented including SWI and Reset.

Turbo9 GitHub page

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